Samsung Electronics will use TSMC’s 3-nanometer process to produce the base dies for Nvidia’s next-generation custom high-bandwidth memory chips, Reuters reported on Sunday, citing the Seoul Economic Daily. If the arrangement proceeds as described, it would be the first time Samsung has worked with the Taiwanese contract chipmaker at the HBM manufacturing stage, according to the report.
The detail matters because Samsung and TSMC are the industry’s two leading advanced foundries and direct rivals. Samsung building a critical layer of its memory product on its competitor’s process is the kind of concession that usually only a customer of Nvidia’s scale can extract.
One design, three suppliers
Nvidia has asked all three of its memory suppliers — Samsung, SK Hynix and Micron Technology — to use TSMC’s process for the base dies of its custom memory, known as NVHBM, and sixth-generation DRAM technology for the core dies stacked on top, the newspaper said, citing industry sources.
Samsung accepted Nvidia’s requirements after an internal review, the report said. SK Hynix and Micron were described as having received the same request; the report did not say either has agreed to it, and none of the companies involved has publicly confirmed the arrangement.
What NVHBM changes
NVHBM, which Nvidia unveiled in August, moves Nvidia’s custom memory controller out of the accelerator chip and into the base die at the bottom of the memory stack. In its announcement, Nvidia said the design is meant to standardize implementation across multiple memory suppliers, so the same memory specification can be sourced from several vendors without each one engineering its own version.
Nvidia claims the design delivers up to 30 percent more memory bandwidth per stack than standard HBM4E, up to 15 percent lower HBM power use, and up to 25 percent more room on the accelerator’s compute die, because a narrower memory interface leaves more silicon for computing. Those are the company’s own “up to” figures, not independent measurements.
The base die is where those gains are decided. Nvidia says shrinking the interface circuitry — the physical layer, or PHY, plus its support logic — cuts that area by up to 67 percent compared with the JEDEC HBM4E standard. Who manufactures that layer, and on what process, therefore shapes the performance of the whole stack.
Why Nvidia wants a single recipe
Analysis: A common base-die process gives Nvidia one design to validate instead of three, and makes the output of rival memory makers closer to interchangeable. That reduces Nvidia’s qualification work and strengthens its hand with each supplier, since no single vendor’s process quirks become a bottleneck. It also extends TSMC’s reach one step deeper into the AI supply chain: even memory sold by Samsung would carry a TSMC-made layer at its foundation.
Micron has already moved in a similar direction on its own. Speaking at the company’s fiscal fourth-quarter earnings event on September 30, Micron technology chief Scott DeBoer said its standard HBM4E family and its custom NVHBM products, co-designed with Nvidia, were being developed with base dies made on foundry processes — a change from its HBM4 approach, which paired its DRAM core dies with an in-house base die.
A limited yes from Samsung
Samsung’s reported acceptance comes with boundaries. The company plans to retain its in-house production model for standard HBM and for custom products made for other customers, according to the Seoul Economic Daily — the TSMC arrangement, as reported, covers the NVHBM base die for Nvidia, not Samsung’s memory business as a whole.
Samsung is also assessing whether its own foundry could produce NVHBM base dies if demand exceeds TSMC’s capacity, the newspaper said, quoting an unnamed source. That keeps a fallback open, and a measure of pride: Samsung’s foundry would remain a candidate for the very work it is reportedly handing to its rival.
For now, the story rests on a single newspaper’s reporting, relayed by Reuters, and on Nvidia’s published description of NVHBM itself. Confirmation from any of the four companies involved — or word that SK Hynix and Micron have accepted the same terms — would turn a reported arrangement into a settled one, and would mark a notable reshaping of how the AI industry’s most contested component gets built.
